Intel Discusses Xeon 6+, 18A Wafer Allocation, and AI Demand
TL;DR. Intel's Kira Boyko and Tim Wilson detailed Clearwater Forest Xeon 6+ processors at Computex, addressing technical choices and production challenges. - Intel revealed why hyper-threading was removed from E-core server parts for the Xeon 6+ lineup. - The company highlighted the tight 18A process supply, affecting chip allocation for customers. - Discussions included the architecture's design choices and its role in meeting agentic AI demands.
- Intel's Xeon 6+ "Clearwater Forest" processors utilize the 18A process node.
- Intel executives explained the removal of hyper-threading from E-core Xeon server parts.
- Manufacturing capacity on the 18A process is constrained, impacting chip distribution.